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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 391 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 391 Page - Freescale Semiconductor, Inc |
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391 / 1348 page  Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1) MC9S12XDP512 Data Sheet, Rev. 2.21 Freescale Semiconductor 391 Figure 8-24. PWM 16-Bit Mode Once concatenated mode is enabled (CONxx bits set in PWMCTL register), enabling/disabling the corresponding 16-bit PWM channel is controlled by the low order PWMEx bit. In this case, the high order bytes PWMEx bits have no effect and their corresponding PWM output is disabled. In concatenated mode, writes to the 16-bit counter by using a 16-bit access or writes to either the low or high order byte of the counter will reset the 16-bit counter. Reads of the 16-bit counter must be made by 16-bit access to maintain data coherency. PWMCNT6 PWCNT7 PWM7 Clock Source 7 High Low Period/Duty Compare PWMCNT4 PWCNT5 PWM5 Clock Source 5 High Low Period/Duty Compare PWMCNT2 PWCNT3 PWM3 Clock Source 3 High Low Period/Duty Compare PWMCNT0 PWCNT1 PWM1 Clock Source 1 High Low Period/Duty Compare |
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