PC912XDP512F0MPVR datasheet(592/1348 Pages) FREESCALE

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Chapter 15 Background Debug Module (S12XBDMV2)

MC9S12XDP512 Data Sheet, Rev. 2.21

592

Freescale Semiconductor

within a few percent of the actual target speed and the communication protocol can easily tolerate speed

errors of several percent.

As soon as the SYNC request is detected by the target, any partially received command or bit retrieved is

discarded. This is referred to as a soft-reset, equivalent to a time-out in the serial communication. After the

SYNC response, the target will consider the next negative edge (issued by the host) as the start of a new

BDM command or the start of new SYNC request.

Another use of the SYNC command pulse is to abort a pending ACK pulse. The behavior is exactly the

same as in a regular SYNC command. Note that one of the possible causes for a command to not be

acknowledged by the target is a host-target synchronization problem. In this case, the command may not

have been understood by the target and so an ACK response pulse will not be issued.

15.4.10 Instruction Tracing

When a TRACE1 command is issued to the BDM in active BDM, the CPU exits the standard BDM

ﬁrmware and executes a single instruction in the user code. Once this has occurred, the CPU is forced to

return to the standard BDM ﬁrmware and the BDM is active and ready to receive a new command. If the

TRACE1 command is issued again, the next user instruction will be executed. This facilitates stepping or

tracing through the user code one instruction at a time.

If an interrupt is pending when a TRACE1 command is issued, the interrupt stacking operation occurs but

no user instruction is executed. Once back in standard BDM ﬁrmware execution, the program counter

points to the ﬁrst instruction in the interrupt service routine.

Be aware when tracing through the user code that the execution of the user code is done step by step but

all peripherals are free running. Hence possible timing relations between CPU code execution and

occurrence of events of other peripherals no longer exist.

Do not trace the CPU instruction BGND used for soft breakpoints. Tracing the BGND instruction will

result in a return address pointing to BDM ﬁrmware address space.

When tracing through user code which contains stop or wait instructions the following will happen when

the stop or wait instruction is traced:

The CPU enters stop or wait mode and the TRACE1 command can not be ﬁnished before leaving

the low power mode. This is the case because BDM active mode can not be entered after CPU

executed the stop instruction. However all BDM hardware commands except the BACKGROUND

command are operational after tracing a stop or wait instruction and still being in stop or wait

mode. If system stop mode is entered (all bus masters are in stop mode) no BDM command is

operational.

As soon as stop or wait mode is exited the CPU enters BDM active mode and the saved PC value

points to the entry of the corresponding interrupt service routine.

In case the handshake feature is enabled the corresponding ACK pulse of the TRACE1 command

will be discarded when tracing a stop or wait instruction. Hence there is no ACK pulse when BDM

active mode is entered as part of the TRACE1 command after CPU exited from stop or wait mode.

All valid commands sent during CPU being in stop or wait mode or after CPU exited from stop or

wait mode will have an ACK pulse. The handshake feature becomes disabled only when system

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