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PC912XDP512F0MPVR 데이터시트(PDF) 666 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 666 Page - Freescale Semiconductor, Inc |
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666 / 1348 page ![]() Chapter 18 Memory Mapping Control (S12XMMCV3) MC9S12XDP512 Data Sheet, Rev. 2.21 666 Freescale Semiconductor 18.3.2.7 EEPROM Page Index Register (EPAGE) Read: Anytime Write: Anytime These eight index bits are used to page 1 KByte blocks into the EEPROM page window located in the local (CPU or BDM) memory map from address 0x0800 to address 0x0BFF (see Figure 18-14). This supports accessing up to 256 Kbytes of EEPROM (in the Global map) within the 64 KByte Local map. The EEPROM page index register is effectively used to construct paged EEPROM addresses in the Local map format. CAUTION XGATE write access to this register during an CPU access which makes use of this register could lead to unexpected results. Figure 18-14. EPAGE Address Mapping The reset value of 0xFE ensures that there is a linear EEPROM space available between addresses 0x0800 and 0x0FFF out of reset. The fixed 1K page 0x0C00–0x0FFF of EEPROM is equivalent to page 255 (page number 0xFF). Address: 0x0017 76543210 R EP7 EP6 EP5 EP4 EP3 EP2 EP1 EP0 W Reset 11111110 Figure 18-13. EEPROM Page Index Register (EPAGE) Table 18-13. EPAGE Field Descriptions Field Description 7–0 EP[7:0] EEPROM Page Index Bits 7–0 — These page index bits are used to select which of the 256 EEPROM array pages is to be accessed in the EEPROM Page Window. Bit16 Bit0 Bit9 Address [9:0] EPAGE Register [7:0] Global Address [22:0] Bit10 Bit17 0 0 1 00 Address: CPU Local Address or BDM Local Address |
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