| 전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 959 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 959 Page - Freescale Semiconductor, Inc |
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959 / 1348 page ![]() 23.0.5.71 Port AD1 Reduced Drive Register 1 (RDR1AD1) Read: Anytime. Write: Anytime. This register configures the drive strength of each PAD[15:8] output pin as either full or reduced. If the port is used as input this bit is ignored. 23.0.5.72 Port AD1 Pull Up Enable Register 0 (PER0AD1) Read: Anytime. Write: Anytime. This register activates a pull-up device on the respective PAD[23:16] pin if the port is used as input. This bit has no effect if the port is used as output. Out of reset no pull-up device is enabled. 76543210 R RDR1AD115 RDR1AD114 RDR1AD113 RDR1AD112 RDR1AD111 RDR1AD110 RDR1AD19 RDR1AD18 W Reset 00000000 Figure 23-73. Port AD1 Reduced Drive Register 1 (RDR1AD1) Table 23-64. RDR1AD1 Field Descriptions Field Description 7–0 RDR1AD1[15:8] Reduced Drive Port AD1 Register 1 0 Full drive strength at output. 1 Associated pin drives at about 1/6 of the full drive strength. 76543210 R PER0AD123 PER0AD122 PER0AD121 PER0AD120 PER0AD119 PER0AD118 PER0AD117 PER0AD116 W Reset 00000000 Figure 23-74. Port AD1 Pull Up Enable Register 0 (PER0AD1) Table 23-65. PER0AD1 Field Descriptions Field Description 7–0 PER0AD1[23:16] Pull Device Enable Port AD1 Register 0 0 Pull-up device is disabled. 1 Pull-up device is enabled. |
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