PC912XDP512F0MPVR datasheet(969/1348 Pages) FREESCALE

969 / 1348 page

23.0.10 Low-Power Options

23.0.10.1 Run Mode

No low-power options exist for this module in run mode.

23.0.10.2 Wait Mode

No low-power options exist for this module in wait mode.

23.0.10.3 Stop Mode

All clocks are stopped. There are asynchronous paths to generate interrupts from stop on port P, H,

and J.

Initialization and Application Information

•

It is not recommended to write PORTx and DDRx in a word access. When changing the

access. Initialize the port data register before enabling the outputs.

•

Power consumption will increase the more the voltages on general purpose input pins

deviate from the supply voltages towards mid-range because the digital input buffers

operate in the linear region.

PJ2

GPIO

CS1

GPIO

CS1

GPIO

CS1

PJ0

GPIO

CS3

GPIO

CS3

GPIO

CS3

1. Depending on ROMON bit. Refer to Device Guide, S12X_EBI section and S12X_MMC section for details.

Table 23-70. Expanded Bus Pin Functions versus Operating Modes (continued)

Single-Chip Modes

Expanded Modes

Normal Single-

Chip

Special Single-

Chip

Normal

Expanded

Emulation

Single-Chip

Emulation

Expanded

Special

Test

PC912XDP512F0MPVR 데이터시트(PDF) 969 Page - Freescale Semiconductor, Inc

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