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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PC912XDP512F0MPVR 데이터시트(PDF) 102 Page - Freescale Semiconductor, Inc |
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PC912XDP512F0MPVR 데이터시트(HTML) 102 Page - Freescale Semiconductor, Inc |
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102 / 1348 page  Chapter 2 Clocks and Reset Generator (S12CRGV6) MC9S12XDP512 Data Sheet, Rev. 2.21 102 Freescale Semiconductor A number greater equal than 4096 rising OSCCLK edges within a check window is called osc ok. Note that osc ok immediately terminates the current check window. See Figure 2-19 as an example. Figure 2-19. Check Window Example The sequence for clock quality check is shown in Figure 2-20. Figure 2-20. Sequence for Clock Quality Check 12 49999 50000 VCO Clock check window 12345 4095 4096 3 OSCCLK osc ok check window osc ok ? SCM active? Switch to OSCCLK Exit SCM Clock OK num = 50 num > 0 ? num=num–1 yes no yes SCME=1 ? no Enter SCM SCM active? yes Clock Monitor Reset no yes no num = 0 yes no POR exit full stop CM fail LVR yes no ? FSTWKP = 0 no num = 0 Enter SCM yes SCME = 1 & FSTWKP = 1 ? |
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