PC912XDP512F0MPVR datasheet(1072/1348 Pages) FREESCALE

1072 / 1348 page

Chapter 26 4 Kbyte EEPROM Module (S12XEETX4KV2)

MC9S12XDP512 Data Sheet, Rev. 2.21

1074

Freescale Semiconductor

26.1.4

Block Diagram

A block diagram of the EEPROM module is shown in Figure 26-1.

Figure 26-1. EETX4K Block Diagram

26.2

External Signal Description

The EEPROM module contains no signals that connect off-chip.

26.3

Memory Map and Register Deﬁnition

This section describes the memory map and registers for the EEPROM module.

26.3.1

Module Memory Map

The EEPROM memory map is shown in Figure 26-2. The HCS12X architecture places the EEPROM

memory addresses between global addresses 0x13_F000 and 0x13_FFFF. The EPROT register, described

in Section 26.3.2.5, “EEPROM Protection Register (EPROT)”, can be set to protect the upper region in the

EEPROM memory from accidental program or erase. The EEPROM addresses covered by this protectable

EETX4K

EEPROM

2K * 16 Bits

sector 0

sector 1

sector 1023

Oscillator

Clock

Divider

Clock

Command

Interrupt

Request

EECLK

Protection

Command Pipeline

cmd2

addr2

data2

cmd1

addr1

data1

Registers

EEPROM

Interface

PC912XDP512F0MPVR 데이터시트(PDF) 1072 Page - Freescale Semiconductor, Inc

PC912XDP512F0MPVR 데이터시트(HTML) 1072 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL