PC912XDP512F0MPVR datasheet(1156/1348 Pages) FREESCALE

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Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)

MC9S12XDP512 Data Sheet, Rev. 2.21

1158

Freescale Semiconductor

All bits in the FPROT register are readable and writable with restrictions (see Section 28.3.2.5.1, “Flash

Protection Restrictions”) except for RNV[6] which is only readable.

During the reset sequence, the FPROT register is loaded from the Flash Conﬁguration Field at global

address 0x7F_FF0D. To change the Flash protection that will be loaded during the reset sequence, the

upper sector of the Flash memory must be unprotected, then the Flash Protect/Security byte located as

described in Table 28-1 must be reprogrammed.

Trying to alter data in any protected area in the Flash memory will result in a protection violation error and

the PVIOL ﬂag will be set in the FSTAT register. The mass erase of a Flash block is not possible if any of

the Flash sectors contained in the Flash block are protected.

76543210

FPOPEN

RNV6

FPHDIS

FPHS

FPLDIS

FPLS

Reset

FFFFF

= Unimplemented or Reserved

Figure 28-10. Flash Protection Register (FPROT)

Table 28-9. FPROT Field Descriptions

Field

Description

FPOPEN

Flash Protection Open — The FPOPEN bit determines the protection function for program or erase as shown

in Table 28-10.

0 The FPHDIS and FPLDIS bits deﬁne unprotected address ranges as speciﬁed by the corresponding

FPHS[1:0] and FPLS[1:0] bits. For an MCU without an EEPROM module, the FPOPEN clear state allows the

main part of the Flash block to be protected while a small address range can remain unprotected for EEPROM

emulation.

1 The FPHDIS and FPLDIS bits enable protection for the address range speciﬁed by the corresponding

FPHS[1:0] and FPLS[1:0] bits.

RNV6

Reserved Nonvolatile Bit — The RNV[6] bit should remain in the erased state for future enhancements.

FPHDIS

Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a

protected/unprotected area in a speciﬁc region of the Flash memory ending with global address 0x7F_FFFF.

0 Protection/Unprotection enabled.

1 Protection/Unprotection disabled.

4:3

FPHS[1:0]

Flash Protection Higher Address Size — The FPHS[1:0] bits determine the size of the protected/unprotected

area as shown inTable 28-11. The FPHS[1:0] bits can only be written to while the FPHDIS bit is set.

FPLDIS

Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a

protected/unprotected area in a speciﬁc region of the Flash memory beginning with global address 0x7F_8000.

0 Protection/Unprotection enabled.

1 Protection/Unprotection disabled.

1:0

FPLS[1:0]

Flash Protection Lower Address Size — The FPLS[1:0] bits determine the size of the protected/unprotected

area as shown in Table 28-12. The FPLS[1:0] bits can only be written to while the FPLDIS bit is set.

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