SA8803

sames

6/10

The acceptable Clock pulse Period (T

The rising edge may not shift more than half a bit period (B

11 x B

Therefore:

11 x 8 x T

.·.

T

(B

22

.·.

T

The acceptable frequency for the clock F

F

1

T

O

.·. F

1

(B

1 )

22

But because:

B

1

(B

where B

F

22

(1 ± 22)

.·.

F

The SA8803 has been specified for an external clock frequency of 8 times the Baud

Rate ± 3%.

FIGURE 3: TIMING DIAGRAM

12

3

T0

CLK

DR-00596

456

7

=

F 0

8 x S CLK

DATA

CLK

S

S

B P

BIT 11

8