FS8170

Page 10

July 2005

Fig. 3 – Phase comparator output waveforms

Charge Pump (CP)

The phase error signal, DO, generated from the PFD will pump charge into an external

loop filter, which then converts the charge to produce the VCO’s tuning voltage. With a

constant pumping rate, the shift of the VCO’s tuning voltage will be directly proportional

to the phase error signal DO. Two pumping rates, 1.5 mA and 6 mA, are provided by the

chip and are selectable through the bit CS as defined previously in Table 5. Also, the

charge pump characteristics corresponding to both modes are shown in the Typical Char-

acteristics section. The internal charge pump may be turned off by the pin ZC. When ZC

is set low, the internal charge pump will stay in its high-impedance state and will not pump

any charge into the external LPF. In this case, the user is allowed to utilize one’s own

charge pump by two control pins

φP and φR which are defined in Table 6. φP and φR are

the error signals directly proportional to the positive/negative phase error when FC = “H.”

When FC = “L,” the relation becomes negative/positive.

Table 7: Setting for the pin ZC

ZC

Do Output

H

Normal output

L

High impedance

f

R

f

V

DO

LD

[FC=”H”]

DO

[FC=”L”]

1.

Pulses of finite width on DO output are generated during locked state to prevent dead zone.

2.

A “locked” condition (LD is HIGH) is indicated when the phase error is less than t1 or t2 at least for

3 consecutive comparison cycles, otherwise an “unlocked” condition (LD is LOW) is indicated.

3.

The values of t

t

t

4.

LD becomes HIGH during power-down mode (when EN is set LOW).