116 datasheet(9/50 Pages) RENESAS

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REJ03B0253-0110

Rev.1.10

Page 9 of 95

Jun 23, 2010

R32C/116 Group

1. Overview

1.3

Block Diagram

Figure 1.2 shows a block diagram of the R32C/116 Group.

Figure 1.2

R32C/116 Group Block Diagram

Port P0

Port P1

Port P2

Port P3

Port P4

Port P5

Port P6

Peripheral functions

Timer:

Timer A 16 bits × 5 timers

Timer B 16 bits × 6 timers

Three-phase motor

controller

Watchdog timer:

15 bits

D/A converter:

8 bits × 2 channels

A/D converter:

10 bits × 1 circuit

Standard: 10 inputs

Maximum: 34 inputs (1)

Serial interface:

9 channels

X-Y converter:

16 bits × 16 bits

Clock generator:

4 circuits

- XIN-XOUT

- XCIN-XCOUT

- On-chip oscillator

- PLL frequency synthesizer

DMAC

CRC calculator (CCITT)

X16 + X12 + X5 + 1

Intelligent I/O

Time Measurement: 16

Wave generation: 24 (2)

Serial interface:

- Variable-length

synchronous serial I/O

- IEBus

R32C/100 Series CPU Core

R2R0

R3R1

R6R4

R7R5

FLG

INTB

ISP

USP

SVF

SVP

VCT

R2R0

R3R1

R6R4

R7R5

Memory

ROM

RAM

Multiplier

Port P14

Port P14_1

Port P11

Port P12

Port P13

DMAC II

Floating-point unit

Port P15

(Note 4)

Notes:

1. 34 inputs are available in the 144-pin package. In the 100-pin package, up to 26 inputs are provided.

2. 24 outputs are available in the 144-pin package. In the 100-pin package, 19 outputs are provided.

3. Eight ports are available in the 144-pin package. In the 100-pin package, five I/O ports and one input-

only port (P9_1) are provided.

4. Ports P11 to P15 are available in the 144-pin package only.

Multi-master I2C-bus

interface:

1 channel

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