24AA014-ESLASHMS datasheet(8/36 Pages) MICROCHIP

8 / 36 page

24AA014/24LC014

DS21809G-page 8

 2010 Microchip Technology Inc.

6.0

WRITE OPERATIONS

6.1

Byte Write

Following the Start signal from the master, the device

code(4 bits), the Chip Select bits (3 bits) and the R/W

bit (which is a logic low) are placed onto the bus by the

master transmitter. The device will acknowledge this

control byte during the ninth clock pulse. The next byte

transmitted by the master is the word address and will

be written into the Address Pointer of the 24AA014/

24LC014. After receiving another Acknowledge signal

from the 24AA014/24LC014, the master device will

transmit the data word to be written into the addressed

memory location. The 24AA014/24LC014 acknowl-

edges again and the master generates a Stop

condition. This initiates the internal write cycle and the

24AA014/24LC014 will not generate Acknowledge

signals during this time (Figure 6-1). If an attempt is

made to write to the protected portion of the array when

the hardware write protection has been enabled, the

device will acknowledge the command, but no data will

be written. The write cycle time must be observed even

if write protection is enabled.

6.2

Page Write

The write-control byte, word address and the first data

byte are transmitted to the 24AA014/24LC014 in the

same way as in a byte write. But instead of generating

a Stop condition, the master transmits up to 15 addi-

tional data bytes to the 24AA014/24LC014 that are

temporarily stored in the on-chip page buffer and will be

written into the memory once the master has transmit-

ted a Stop condition. Upon receipt of each word, the

four lower order Address Pointer bits are internally

incremented by one.

The higher order four bits of the word address remain

constant. If the master should transmit more than 16

bytes prior to generating the Stop condition, the

address counter will roll over and the previously

received data will be overwritten. As with the byte write

operation, once the Stop condition is received, an inter-

nal write cycle will begin (Figure 6-2). If an attempt is

made to write to the protected portion of the array when

the hardware write protection has been enabled, the

device will acknowledge the command, but no data will

be written. The write cycle time must be observed even

if write protection is enabled.

6.3

Write Protection

The WP pin must be tied to VCC or VSS. If tied to VCC,

the entire array will be write-protected. If the WP pin is

tied to VSS, write operations to all address locations are

allowed.

The WP pin is not available on the SOT-23 package.

FIGURE 6-1:

BYTE WRITE

Note:

Page write operations are limited to writ-

ing bytes within a single physical page,

regardless of the number of bytes

actually being written. Physical page

boundaries start at addresses that are

integer multiples of the page buffer size

(or ‘page size’) and end at addresses that

are integer multiples of [page size – 1]. If

a Page Write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being written to the next page, as might be

expected. It is therefore necessary that

the application software prevent page

write operations that would attempt to

cross a page boundary.

Bus Activity

Master

SDA Line

Bus Activity

Control

Byte

Word

Address

Data

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