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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIC16F720-E/P 데이터시트(PDF) 20 Page - Microchip Technology |
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PIC16F720-E/P 데이터시트(HTML) 20 Page - Microchip Technology |
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20 / 244 page  PIC16F/LF720/721 DS41430A-page 20 2010 Microchip Technology Inc. Bank 3 180h( 2) INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx xxxx xxxx 181h OPTION_ REG RABPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 1111 1111 182h( 2) PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000 183h( 2) STATUS IRP RP1 RP0 TO PD ZDC C 0001 1xxx 000q quuu 184h( 2) FSR Indirect Data Memory Address Pointer xxxx xxxx uuuu uuuu 185h ANSELA — — —ANSA4 — ANSA2 ANSA1 ANSA0 ---1 -111 ---1 -111 186h ANSELB — — ANSB5 ANSB4 — — — — --11 ---- --11 ---- 187h ANSELC ANSC7 ANSC6 — — ANSC3 ANSC2 ANSC1 ANSC0 11-- 1111 11-- 1111 188h — Unimplemented — — 18Ah( 1),( 2) PCLATH — — — Write Buffer for the upper 5 bits of the Program Counter ---0 0000 ---0 0000 18Bh( 2) INTCON GIE PEIE TMR0IE INTE RABIE TMR0IF INTF RABIF 0000 000x 0000 000x 18Ch PMCON1 —(4) CFGS LWLO FREE —WREN WR RD 1000 -000 1000 -000 18Dh PMCON2 Program Memory Control Register 2 (not a physical register) ---- ---- ---- ---- 190h — Unimplemented — — 191h — Unimplemented — — 192h — Unimplemented — — 193h — Unimplemented — — 194h — Unimplemented — — 195h — Unimplemented — — 196h — Unimplemented — — 197h — Unimplemented — — 198h — Unimplemented — — 199h — Unimplemented — — 19Ah — Unimplemented — — 19Bh — Unimplemented — — 19Ch — Unimplemented — — 19Dh — Unimplemented — — 19Eh — Unimplemented — — 19Fh — Unimplemented — — TABLE 2-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are transferred to the upper byte of the program counter. 2: These registers can be addressed from any bank. 3: Accessible only when SSPM<3:0> = 1001. 4: This bit is unimplemented and reads as ‘1’. 5: See Register 6-2. |
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