©2010 Silicon Storage Technology, Inc.

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1.8V Serial Quad I/O (SQI) Flash Memory

SST26WF032

Advance Information

Reset-Enable (RSTEN) and Reset (RST)

The Reset operation is used as a system (software) reset that puts the device in normal operating

Ready mode. This operation consists of two commands: Reset-Enable (RSTEN) and Reset (RST).

To reset the SST26WF032, the host drives CE# low, sends the Reset-Enable command (66H), and

drives CE# high. Next, the host drives CE# low again, sends the Reset command (99H), and drives

CE# high, see Figure 7.

The Reset operation requires the Reset-Enable command followed by the Reset command. Any com-

mand other than the Reset command after the Reset-Enable command will disable the Reset-Enable.

A successful command execution will reset the burst length to 8 Bytes and all the bits in the Status reg-

ister to their default states, except for bit 4 (WPLD) and bit 5 (SEC). A device reset during an active

Program or Erase operation aborts the operation, which can cause the data of the targeted address

range to be corrupted or lost. Depending on the prior operation, the reset timing may vary. Recovery

from a Write operation requires more latency time than recovery from other operations.

Figure 7: Reset sequence

1409 F05.0

MODE 3

CLK

SIO(3:0)

CE#

MODE 3

C1

C3 C2

C0

MODE 0

MODE 3

MODE 0

MODE 0

Note: C[1:0] = 66H; C[3:2] = 99H