93LC46BT-ESLASHMS datasheet(10/34 Pages) MICROCHIP

10 / 34 page

93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C

DS21749H-page 10

 2010 Microchip Technology Inc.

2.8

Write

The WRITE instruction is followed by 8 bits (if ORG is

low or A-version devices) or 16 bits (if ORG pin is high

or B-version devices) of data, which are written into the

specified address. For 93AA46A/B/C and 93LC46A/B/C

devices, after the last data bit is clocked into DI, the

falling edge of CS initiates the self-timed auto-erase and

programming cycle. For 93C46A/B/C devices, the self-

timed auto-erase and programming cycle is initiated by

the rising edge of CLK on the last data bit.

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

the data specified and the device is ready for another

instruction.

FIGURE 2-8:

WRITE TIMING FOR 93AA AND 93LC DEVICES

FIGURE 2-9:

WRITE TIMING FOR 93C DEVICES

Note:

After the Write cycle is complete, issuing a

Start bit and then taking CS low will clear

the Ready/Busy status from DO.

CLK

•••

Busy

Ready

High-Z

TWC

TCSL

TCZ

TSV

CLK

•••

Busy

Ready

High-Z

TWC

TCSL

TCZ

TSV

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