전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

ATSAM3S 데이터시트(PDF) 19 Page - ATMEL Corporation

부품명 ATSAM3S
상세설명  AT91 ARM Cortex M3-based Processor
PDF  65 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATSAM3S 데이터시트(HTML) 19 Page - ATMEL Corporation

Back Button ATSAM3S Datasheet HTML 15Page - ATMEL Corporation ATSAM3S Datasheet HTML 16Page - ATMEL Corporation ATSAM3S Datasheet HTML 17Page - ATMEL Corporation ATSAM3S Datasheet HTML 18Page - ATMEL Corporation ATSAM3S Datasheet HTML 19Page - ATMEL Corporation ATSAM3S Datasheet HTML 20Page - ATMEL Corporation ATSAM3S Datasheet HTML 21Page - ATMEL Corporation ATSAM3S Datasheet HTML 22Page - ATMEL Corporation ATSAM3S Datasheet HTML 23Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 65 page
background image
19
6500AS–ATARM–11-Dec-09
SAM3S Summary
Figure 5-3.
Backup Battery
5.4
Active Mode
Active mode is the normal running mode with the core clock running from the fast RC oscillator,
the main crystal oscillator or the PLLA. The power management controller can be used to adapt
the frequency and to disable the peripheral clocks.
5.5
Low Power Modes
The various low power modes of the SAM3S are described below:
5.5.1
Backup Mode
The purpose of backup mode is to achieve the lowest power consumption possible in a system
which is performing periodic wake-ups to perform tasks but not requiring fast startup time
(<0.1ms). Total current consumption is 3 µA typical.
The Supply Controller, zero-power power-on reset, RTT, RTC, Backup registers and 32 kHz
oscillator (RC or crystal oscillator selected by software in the Supply Controller) are running. The
regulator and the core supply are off.
Backup mode is based on the Cortex-M3 deepsleep mode with the voltage regulator disabled.
The SAM3S can be awakened from this mode through WUP0-15 pins, the supply monitor (SM),
the RTT or RTC wake-up event.
Backup mode is entered by using WFE instructions with the SLEEPDEEP bit in the System Con-
trol Register of the Cortex-M3 set to 1. (See the Power management description in The ARM
Cortex M3 Processor section of the product datasheet).
Exit from Backup mode happens if one of the following enable wake up events occurs:
ADC, DAC
Analog Comp.
USB
Transceivers.
VDDIN
Voltage
Regulator
3.3V
LDO
Backup
Battery
+
-
ON/OFF
IN
OUT
VDDOUT
Main Supply
VDDCORE
ADC, DAC, Analog
Comparator Supply
(2.4V-3.6V)
VDDIO
VDDPLL
PIOx (Output)
WAKEUPx
External wakeup signal
Note: The two diodes provide a “switchover circuit” (for illustration purpose)
between the backup battery and the main supply when the system is put in
backup mode.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com