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TAS5508C 데이터시트(PDF) 64 Page - Texas Instruments

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부품명 TAS5508C
상세설명  8-Channel Digital Audio PWM Processor
PDF  107 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

TAS5508C 데이터시트(HTML) 64 Page - Texas Instruments

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23
22
SCLK
32Clks
LRCLK
LeftChannel
24-BitMode
1
20-BitMode
16-BitMode
15
14
MSB
LSB
SCLK
32Clks
RightChannel
2-ChannelRight-Justified(SonyFormat)StereoInput
T0034-03
19
18
1
19
18
1
0
0
0
15
14
15
14
23
22
1
15
14
MSB
LSB
19
18
1
19
18
1
0
0
0
15
14
15
14
TAS5508C
SLES257 – SEPTEMBER 2010
www.ti.com
4.8.3
Right-Justified Timing
Right-justified (RJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when
it is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at
64 × Fs is used to clock in the data. The first bit of data appears on the data lines eight bit-clock periods (for
24-bit data) after LRCLK toggles. In RJ mode the LSB of data is always clocked by the last bit clock before
LRCLK transitions. The data is written MSB first and is valid on the rising edge of the bit clock. The TAS5508C
masks unused leading data bit positions.
Figure 4-11. Right-Justified 64-Fs Format
64
Electrical Specifications
Copyright © 2010, Texas Instruments Incorporated
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