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PIC18F23K22-E/ML 데이터시트(PDF) 453 Page - Microchip Technology

부품명 PIC18F23K22-E/ML
상세설명  28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
PDF  496 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F23K22-E/ML 데이터시트(HTML) 453 Page - Microchip Technology

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 2010 Microchip Technology Inc.
Preliminary
DS41412C-page 453
PIC18(L)F2X/4XK22
FIGURE 27-15:
I2C™ BUS START/STOP BITS TIMING
TABLE 27-16: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
Param.
No.
Symbol
Characteristic
Min
Max
Units Conditions
70
TssL2scH,
TssL2scL
SS
 to SCK  or SCK  Input
TCY
—ns
71
TscH
SCK Input High Time
(Slave mode)
Continuous
1.25 TCY + 30
—
ns
71A
Single Byte
40
—
ns
(Note 1)
72
TscL
SCK Input Low Time
(Slave mode)
Continuous
1.25 TCY + 30
—
ns
72A
Single Byte
40
—
ns
(Note 1)
73A
Tb2b
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2
1.5 TCY + 40
—
ns
(Note 2)
74
TscH2diL,
TscL2diL
Hold Time of SDI Data Input to SCK Edge
100
—
ns
75
TdoR
SDO Data Output Rise Time
—
25
ns
76
TdoF
SDO Data Output Fall Time
—
25
ns
77
TssH2doZ
SS
 to SDO Output High-Impedance
10
50
ns
78
TscR
SCK Output Rise Time
(Master mode)
—25
ns
79
TscF
SCK Output Fall Time (Master mode)
—
25
ns
80
TscH2doV,
TscL2doV
SDO Data Output Valid after SCK Edge
—
50
ns
82
TssL2doV
SDO Data Output Valid after SS
 Edge
—
50
ns
83
TscH2ssH,
TscL2ssH
SS
 after SCK Edge
1.5 TCY + 40
—
ns
Note 1:
Requires the use of Parameter #73A.
2:
Only if Parameter #71A and #72A are used.
Note:
Refer to Figure 27-4 for load conditions.
91
92
93
SCL
SDA
Start
Condition
Stop
Condition
90



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