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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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VSC056 데이터시트(PDF) 19 Page - Maxim Integrated Products |
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VSC056 데이터시트(HTML) 19 Page - Maxim Integrated Products |
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19 / 134 page  19 of 134 VSC056 Data Sheet Revision 4.1 January 2008 The following table provides the mapping of the register sets by address. E9h R/W MIPS Master Interface Port Select Register EAh R/W MID Master Interface Data Register EBh R/W MIC Master Interface Command Register ECh R/W MILC Master Interface Low-Level Control Register EDh R MIS Master Interface Status Register EEh R MIRD Master Interface Read Data Register F0h R/W BCP70 Bit Control Port 7 - Bit 0 Register F1h R/W BCP71 Bit Control Port 7 - Bit 1 Register F2h R/W BCP72 Bit Control Port 7 - Bit 2 Register F3h R/W BCP73 Bit Control Port 7 - Bit 3 Register F4h R/W BCP74 Bit Control Port 7 - Bit 4 Register F5h R/W BCP75 Bit Control Port 7 - Bit 5 Register F6h R/W BCP76 Bit Control Port 7 - Bit 6 Register F7h R/W BCP77 Bit Control Port 7 - Bit 7 Register F8h R/W BCIS Backplane Controller Interrupt Status Register FCh R/W BCT Backplane Controller Test Register FDh R/W CSC Clock Select Control Register FEh R/W CDC Clock Divider Control Register FFh R VER Backplane Controller Version Register Table 3. Address Map 11b 10b 01b 00b Address GPD3 GPD2 GPD1 GPD0 00h GPD7 GPD6 GPD5 GPD4 04h reserved reserved reserved reserved 08h-0Ch DDP3 DDP2 DDP1 DDP0 10h DDP7 DDP6 DDP5 DDP4 14h reserved reserved reserved reserved 18h-1Ch PBC3 PBC2 PBC1 PBC0 20h PBC7 PBC6 PBC5 PBC4 24h PBC11 PBC10 PBC9 PBC8 28h PBC15 PBC14 PBC13 PBC12 2Ch reserved FSCC0 FSCO0 FSC0 30h reserved FSCC1 FSCO1 FSC1 34h reserved FSCC2 FSCO2 FSC2 38h reserved FSCC3 FSCO3 FSC3 3Ch reserved FSCC4 FSCO4 FSC4 40h reserved FSCC5 FSCO5 FSC5 44h reserved FSCC6 FSCO6 FSC6 48h Table 2. Register Map (continued) Data Memory Address Access Label Description |
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