| 전자부품 데이터시트 검색엔진 |
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TSC103IDT 데이터시트(PDF) 15 Page - STMicroelectronics |
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TSC103IDT 데이터시트(HTML) 15 Page - STMicroelectronics |
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15 / 23 page ![]() TSC103 Maximum permissible voltages on pins Doc ID 16873 Rev 1 15/23 5 Maximum permissible voltages on pins The TSC103 can be used in either single- or dual-supply configuration. The dual-supply configuration is achieved by disconnecting Vcc- and Gnd, and connecting Vcc- to a negative supply. Figure 8 illustrates how the absolute maximum voltages on input pins Vp and Vm are referred to the Vcc- potential, while the maximum voltages on the positive supply pin, gain selection pins and output pins are referred to the Gnd pin. It should also be noted that the maximum voltage between Vcc- and Vcc+ is limited to 15 V. Figure 8. Maximum voltages on pins +75 V Vp and Vm Vcc+ -16 V +15 V +7 V Vp and Vm -0.3 V Vcc+ + 0.3 V SEL1, SEL2 and Out SEL1, SEL2 and Out Vcc- Vcc- Gnd Vcc+ Gnd -0.3V Vcc+ AM04522 |
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