ST10F276Z5 datasheet(116/239 Pages) STMICROELECTRONICS

116 / 239 page

System reset

ST10F276Z5

116/239

Figure 29.

Synchronous short / long hardware RESET (EA = 0)

RSTIN assertion can be released there. Refer also to Section 21.1 for details on minimum pulse duration.

If during the reset condition (RSTIN low), RPD voltage drops below the threshold voltage (about 2.5 V for 5 V operation),

the asynchronous reset is then immediately entered.

3. 3 to 8 TCL depending on clock source selection.

RSTIN pin is pulled low if bit BDRSTEN (bit 3 of SYSCON register) was previously set by software. Bit BDRSTEN is

cleared after reset.

Minimum RSTIN low pulse duration shall also be longer than 500ns to guarantee the pulse is not masked by the internal

filter (refer to Section 19.6).

P0[15:13]

not transparent

RSTF

P0[12:2]

transparent

not t.

P0[1:0]

not t.

not transparent

RST

1024 TCL

3..8 TCL3)

2) VRPD > 2.5 V Asynchronous Reset not entered

200 mA Discharge

RPD

RSTOUT

At this time RSTF is sampled HIGH or LOW

so it is SHORT or LONG reset

(After Filter)

RSTIN

< 1032 TCL

≤4 TCL5)

≤12 TCL

≤ 500 ns

≥ 50 ns

≤ 500 ns

≥ 50 ns

≤ 500 ns

≥ 50 ns

ALE

8 TCL

not t.

ST10F276Z5 데이터시트(PDF) 116 Page - STMicroelectronics

ST10F276Z5 데이터시트(HTML) 116 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL