IR3831MPBF datasheet(4/31 Pages) IRF

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11/05/10

IR3831MPbF

Pin Description

Name

Description

Track pin. Use External resistors from VDDQ rail. The Vp voltage can

be set to 0.9V for DDR2 application and 0.75 or 0.6V for DDR3

application.

Inverting input to the error amplifier. This pin is connected directly to the

output of the regulator via resistor divider to set the output voltage and

provide feedback to the error amplifier.

Comp

Output of error amplifier. An external resistor and capacitor network is

typically connected from this pin to Fb pin to provide loop

compensation.

Gnd

Signal ground for internal reference and control circuitry.

Set the switching frequency. Connect an external resistor from this pin

to Gnd to set the switching frequency.

SS/SD

¯¯

Soft start / shutdown. This pin provides user programmable soft-start

function. Connect an external capacitor from this pin to Gnd to set the

start up time of the output voltage. The converter can be shutdown by

pulling this pin below 0.3V.

OCSet

Current limit set point. A resistor from this pin to SW pin will set the

current limit threshold.

PGood

Power Good status pin. Output is open drain. Connect a pull up resistor

from this pin to Vcc. If unused, it can be left open.

This pin powers the internal IC and drivers. A minimum of 1uF high

frequency capacitor must be connected from this pin to the power

ground (PGnd).

PGnd

Power Ground. This pin serves as a separated ground for the MOSFET

drivers and should be connected to the system’s power ground plane.

Switch node. This pin is connected to the output inductor.

Input voltage connection pin.

Boot

Supply voltage for high side driver. Connect a 0.1uF capacitor from this

pin to SW.

Enable

Enable pin to turn on and off the device.

Gnd

Signal ground for internal reference and control circuitry.

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