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TLE4675D 데이터시트(PDF) 5 Page - Infineon Technologies AG |
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TLE4675D 데이터시트(HTML) 5 Page - Infineon Technologies AG |
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5 / 25 page ![]() Data Sheet 5 Rev. 1.0, 2008-09-30 TLE4675 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment TLE4675D (PG-TO252-5) Figure 2 Pin Assignment (top view) TLE4675D 3.2 Pin Definitions and Functions TLE4675D Pin Symbol Function 1I Regulator Input and IC Supply For compensating line influences, a capacitor to GND close to the IC pin is recommended. 2RO Reset Output Open collector output; external pull up resistor required; Leave open if the reset function is not needed. 3 Internally connected to TAB 4D Reset Delay Timing Connect a ceramic capacitor from D (Pin 4) to GND for the reset delay timing adjustment; Leave open, if reset functionality is not used. 5Q 5 V Regulator Output Connect a capacitor between Q (Pin 5) and GND close to the IC pins, respecting capacitance and ESR requirements given in the Chapter 4.2 Functional Range. TAB GND Ground, Cooling TAB Connect to heatsink area AEP02580 15 RO Ι DQ GND |
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