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FX602P3 데이터시트(PDF) 5 Page - CML Microcircuits |
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FX602P3 데이터시트(HTML) 5 Page - CML Microcircuits |
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5 / 29 page ![]() Calling Line Identifier FX602 © 1998 Consumer Microcircuits Limited 5 D/602/7 Packages D4 / P3 Signal Description Pin No. Name Type 12 IRQN O/P An open-drain active low output that may be used as an Interrupt Request / Wake-up input to the associated µC. An external pull-up resistor should be connected between this output and VDD. 13 DET O/P A logic level output driven by the Ring or Line Polarity Reversal Detector, the Tone Alert Detector or the FSK Level detect circuits, depending on the operating mode. See section 1.5.1. 14 RXCK I/P A logic level input which may be used to clock received data bits out of the FSK Data Retiming block. 15 RXD O/P A logic level output carrying either the raw output of the FSK Demodulator or re-timed 8-bit characters depending on the state of the RXCK input. See section 1.5.6 16 VDD Power The positive supply rail. Levels and thresholds within the device are proportional to this voltage. Should be decoupled to VSS by a capacitor mounted close to the device pins. Notes: I/P = Input I/P (S) = Schmitt trigger input O/P = Output BI = Bidirectional |
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