FX663P3 datasheet(5/17 Pages) CMLMICRO

5 / 17 page

D/663/3

1.3

Signal List (continued)

Package

D4/P3

Signal

Description

Pin No.

Name

Type

Vss

Power

The negative supply rail (ground).

SIGIN

I/P

Signal input. The signal to this pin should be ac

coupled. The dc bias of this pin is set internally.

VBIAS

O/P

Internally generated bias voltage, held at VDD /2

when the device is not in powersave mode. It

should be decoupled to Vss by a capacitor

mounted close to the device pins. In powersave

mode this pin is pulled towards VSS.

AMPNINV

I/P

The non-inverting input to the on-chip amplifier.

AMPINV

I/P

The inverting input to the on-chip amplifier.

AMPOP

O/P

The output of the on-chip amplifier, this is

internally connected to the input of the Level

Detector.

VDD

Power

The positive supply rail. Levels and voltages are

dependent upon this supply. This pin should be

decoupled to VSS by a capacitor.

Notes: I/P

Input

O/P

Output

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