| 전자부품 데이터시트 검색엔진 |
|
AP6714 데이터시트(PDF) 13 Page - Diodes Incorporated |
|
|
|||||||||||||||||||||||||||||
AP6714 데이터시트(HTML) 13 Page - Diodes Incorporated |
|
13 / 15 page ![]() AP6714 1.8MHz SYNCHRONOUS BOOST CONVERTER AP6714 Rev. 4 13 of 15 FEBRUARY 2009 www.diodes.com © Diodes Incorporated Inductor Selection The high frequency operation of the AP6714 allows the use of small surface mount inductors. The minimum inductance value is limited by the following constraints: H V I f V V V L MAX OUT Ripple SW MIN IN MAX OUT MIN IN ) ( ) ( ) ( ) ( ) ( ) ( × × − × > Where f= Operating frequency (Hz) ISW(Ripple)= Allowable Inductor Current Ripple (A) VIN(MIN)= Minimum Input Voltage (V) VOUT(MAX)= Maximum Output Voltage (V) Over Current Protection (OCP) A resistor is required to connect PGND pin and OCP pin to prevent an overload occurs at the output. The output voltage will drop and duty cycle will be reduced if the OCP exceeds 0.16V. When ROCP is 0.1Ω, the maximum switching current to operate normally is 1.6A (0.16V/0.1 Ω). However, the actual switching current is related to duty ratio. By the way, larger ROCP is recommended when VOUT − VIN ≤ 0.5V since the dropped output voltage is smaller then regular case while an overload condition exists. Internal circuit of OCP function Thermal Information The maximum recommended junction temperature (TJ) of AP6714 is 125°C. The thermal resistance of the 10-pin MSOP10 package is RθJA = 161°C/W, if the Power PAD is soldered. Specified regulator operation is assured to an ambient temperature TA of 45°C. Therefore, the maximum power dissipation is about 500mW. More power can be dissipated if the maximum ambient temperature of the application is lower. JA A MAX J MAX D R T T P θ − = ) ( ) ( Designing a PC Board Good PC board layout is important to achieve optimal performance from AP6714. Poor design can cause excessive conducted and/or radiated noise. Conductors carrying discontinuous currents and any high-current path should be made as short and wide as possible. A separate low-noise ground plane contain-ing the reference and signal grounds should connect to the power-ground plane at only one point to minimize the effects of power-ground currents. Typically, the ground planes are best joined right at the IC. Keep the voltage-feedback network very close to the IC, preferably within 0.2in (5mm) of the FB pin. Nodes with high dV/dt (switching nodes) should be kept as small as possible and should be routed away from high-impedance nodes such as FB. Application Information (Continued) |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |