전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

STTS751-1DP3F 데이터시트(PDF) 27 Page - STMicroelectronics

부품명 STTS751-1DP3F
상세설명  2.25 V low-voltage local digital temperature sensor
PDF  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STTS751-1DP3F 데이터시트(HTML) 27 Page - STMicroelectronics

Back Button STTS751-1DP3F Datasheet HTML 23Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 24Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 25Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 26Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 27Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 28Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 29Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 30Page - STMicroelectronics STTS751-1DP3F Datasheet HTML 31Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 27 / 36 page
background image
STTS751
DC and AC parameters
Doc ID 16483 Rev 5
27/36
VPV
Pull-up supply voltage
(open drain)
(Addr/Therm)–0.3
3.6
V
EVENT, SDA, SCL
–0.3
5.5
V
VPOR
Power On Reset threshold
(POR) - TS
VDD falling edge
1.75
V
tTIMEOUT
SMBus timeout(5)
25
35
ms
tSP
Spike suppression
Pulse width of spikes that must
be suppressed by the input filter
Input filter on SCL and
SDA
50
ns
1.
Valid for ambient operating temperature: TA = –40 to +125 °C; VDD = 2.25 V to 3.6 V (except where noted).
2.
Typical numbers are for TA = +25 °C; VDD = 3.0 V
3.
Not tested, guaranteed by design.
4.
Accuracy measurements made at resolutions > 10 bits.
5.
SMBus timeout min and max are valid for TA = –30 to +125 °C.
Table 28.
DC and AC characteristics (continued)
Symbol
Description
Test condition(1)
Min
Typ(2)
Max
Unit
Table 29.
AC characteristics
Symbol
Description
Min
Typ
Max
Unit
fSCL
SMBus/I2C clock frequency
10
400
kHz
tHIGH
Clock high period
600
ns
tLOW
Clock low period
1.3
µs
tR
Clock/data rise time
300
ns
tF
Clock/data fall time
300
ns
tSU:DAT
Data setup time
100
ns
tHD:DI
Data in hold time
0
ns
tHD:DAT
Data out hold time
300
ns
tSU:STA
Start condition setup time
600
ns
tHD:STA
Hold time after (repeated) start condition. After this period,
the first clock cycle is generated.
600
ns
tSU:STO
Stop condition setup time
600
ns
tBUF
Bus free time between stop (P) and start (S) conditions
1.3
µs



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com