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MPC8308 데이터시트(PDF) 19 Page - Freescale Semiconductor, Inc |
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MPC8308 데이터시트(HTML) 19 Page - Freescale Semiconductor, Inc |
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19 / 90 page ![]() MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2 Freescale Semiconductor 19 Ethernet: Three-Speed Ethernet, MII Management Figure 9 shows the MII receive AC timing diagram. Figure 9. MII Receive AC Timing Diagram RMII AC Timing Specifications Figure 10 provides the AC test load. Figure 10. AC Test Load 8.2.2 RGMII AC Timing Specifications Table 25 presents the RGMII AC timing specifications. Table 25. RGMII AC Timing Specifications At recommended operating conditions with LVDD of 2.5 V ± 5%. Parameter/Condition Symbol 1 Min Typ Max Unit Data to clock output skew (at transmitter) tSKRGT –0.6 — 0.6 ns Data to clock input skew (at receiver) 2 tSKRGT 1.0 — 2.6 ns Clock cycle duration 3 tRGT 7.2 8.0 8.8 ns Duty cycle for 1000Base-T 4, 5 tRGTH/tRGT 45 50 55 % Duty cycle for 10BASE-T and 100BASE-TX 3, 5 tRGTH/tRGT 40 50 60 % Rise time (20%–80%) tRGTR — — 0.75 ns Fall time (20%–80%) tRGTF — — 0.75 ns RX_CLK RXD[3:0] tMRDXKH tMRX tMRXH tMRXR tMRXF RX_DV RX_ER tMRDVKH Valid Data Output Z0 = 50 Ω NVDD/2 RL = 50 Ω or LVDD/2 |
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