LAB

SEME

IP1M10 SERIES

IP1M12 SERIES

Prelim. 7/95

INTERNAL

BIASING

12

PWM

A

11

DIR

A

5

DIR

B

CB

V

6

25

Ω

25

Ω

14

1

OA

+V

7

OB

+V

8

OB

–V

EA

V

13

CA

V

2

3

SS

V

4

PWM

B

GND

10

EB

V

9

Logic Supply Voltage

1M10 Series

1M12 Series

Driver Supply Voltage

Logic Inputs

Output Current, DC

1Mxx / 2Mxx Series

3Mxx Series

Peak Output Current

1Mxx / 2Mxx Series

3Mxx Series

Operating Ambient Temperature Range

1Mxx Series

2Mxx Series

3Mxx Series

+4.75 to +5.25V

+7 to +36V

+4.75 to +36V

0 to +36V

±100mA

±200mA

±125mA

±250mA

-55 to +125°C

-40 to +85°C

0 to +70°C

RECOMMENDED OPERATING CONDITIONS

BLOCK DIAGRAM

DESCRIPTION

The IP1M10 and IP1M12 series each contain two full H-bridge power drivers capable of delivering 200 mA continuous

output current per channel (100mA for 1Mxx / 2Mxx). Each bridge may be run from its own supply voltage of up to 36V

and is controlled by 2 high voltage protected logic level inputs with internal hysteresis for noise immunity.

Protection features include thermal shutdown, peak current limiting, crossover current blanking, and internal output

clamp diodes. Logic supply current is provided by a separate pin so that standby power dissipation may be minimised.

The IP1M10 series requires a +5V logic supply while the IP1M12 series requires a logic supply voltage of +7V or greater,

and is typically used in single supply applications.

The IP1M10 and IP1M12 are available in a 14 lead ceramic DIP while the IP2M10, IP2M12, IP3M10, IP3M12 are avail-

able in the 14 lead ceramic DIP, 14 lead plastic DIP, and 14 lead plastic SOIC packages.

INPUTS

OUTPUTS

DIR

PWM

LOW

LOW

HIGH

HIGH

LOW

HIGH

LOW

HIGH

Z*

LOW

HIGH

HIGH

HIGH

HIGH

Z*

LOW

* Z = High Impedance.