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PCA9505 데이터시트(PDF) 3 Page - NXP Semiconductors |
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PCA9505 데이터시트(HTML) 3 Page - NXP Semiconductors |
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3 / 34 page ![]() PCA9505_9506 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 4 — 3 August 2010 3 of 34 NXP Semiconductors PCA9505/06 40-bit I2C-bus I/O port with RESET, OE and INT 5. Block diagram All I/Os are set to inputs at power-up and RESET. Fig 1. Block diagram of PCA9505/06 PCA9505/PCA9506 POWER-ON RESET 002aab492 VSS VDD RESET I2C-BUS CONTROL LOW PASS INPUT FILTERS SCL SDA A0 A1 INT OE 8-bit IO0_0 IO0_1 IO0_2 IO0_3 IO0_4 IO0_5 IO0_6 IO0_7 INPUT/ OUTPUT PORTS BANK 0 write pulse 0 read pulse 0 BANK 1 BANK 2 BANK 3 8-bit IO4_0 IO4_1 IO4_2 IO4_3 IO4_4 IO4_5 IO4_6 IO4_7 INPUT/ OUTPUT PORTS BANK 4 write pulse 4 read pulse 4 A2 LP FILTER INTERRUPT MANAGEMENT |
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