PCA9621

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Product data sheet

Rev. 1 — 9 March 2011

4 of 18

NXP Semiconductors

PCA9621

65 mA 8-bit 2-wire bus output port

7.

Functional description

Refer to Figure 1 “Block diagram of PCA9621”.

The power supply voltage for the PCA9621 may be any voltage in the range 2.7 V to

7.2 SCL, SDA — 2-wire bus interface

The state of the output ports is determined by the Control register, which is set and read

7.3 P0 to P7 — output ports

There are eight open-drain output ports whose state is determined by the Control register.

Programming a ‘1’ or HIGH to the relevant register bit will turn on the corresponding port,

resulting at a LOW or ‘0’ at the port. In the case of LED driving, this would result in the

LED turning ON.

Programming a ‘0’ or LOW in the register turns off the open-drain port, placing it in a

high-impedance mode.

The ports are protected by ESD diodes to the supplies so they must not be driven above

7.4 RESET — reset IC to default state

The active LOW RESET input is used to disable the buffer and reset it to its default state.

The RESET signal will clear the contents of the Control register, turning off all output

7.5 Power-On Reset (POR)

During power-on, the PCA9621 is internally held in the reset condition for a maximum of

(all zeros), resulting in all output ports being off (high-impedance).