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UR5512-SH2-R 데이터시트(PDF) 5 Page - Unisonic Technologies

부품명 UR5512-SH2-R
상세설명  2A DDR BUS TERMINATION REGULATOR
PDF  7 Pages
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제조업체  UTC [Unisonic Technologies]
홈페이지  http://www.utc-ic.com
Logo UTC - Unisonic Technologies

UR5512-SH2-R 데이터시트(HTML) 5 Page - Unisonic Technologies

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UR5512
LINEAR INTEGRATED CIRCUIT
UNISONICTECHNOLOGIESCO.,LTD
5 of 7
www.unisonic.com.tw
QW-R101-017,D
FUNCTIONAL DESCRIPTION
General Information
The UTC UR5512 is a linear regulator designed for DDR SDRAM bus terminator application. The output, VOUT is
capable of sourcing or sinking current up to 2A peak while regulating the output voltage to within 20mV offset. The
UTC UR5512 has excellent response to load regulation while preventing shoot through. Active-low shutdown
mechanism and fault protections. The UTC UR5512 is available in several packages to meet different power
dissipation and surface mount applications.
Output Voltage Regulation
The output voltage tracks the reference voltage applied at VREF pin. Two internal NPN pass transistors act as
the buffered output regulate the output voltage by sourcing current from VIN pin or sinking current to GND pin. An
internal Kelvin sensing scheme is use at the VOUT pin to improve load regulation at various load current. Since the
UTC UR5512 exhibits excellent response to load transient, lesser amount of capacitors can be used.
Current Limit
An internal current limiting sensor is used to monitor the maximum output current to prevent damages from
overload or short-circuit condition. Increasing the input voltage of VIN or VCNTL will get higher current-limit points.
Shutdown and Soft-Start
An additional function of the VREF pin is acting as a shutdown control input that can be used for suspend to RAM
functionality. Applying and holding a voltage below 0.15V to VREF pin shuts down the output of the regulator. An
external NPN transistor or N-channel MOSFET is used to pull down the VREF pin voltage; while applying a “high”
signal to turn on the transistor. During shutdown condition, the two pass transistors are turned off and the output
VOUT will tri-state; sourcing or sinking no current. When releasing the VREF pin, the current through the resistor
divider charges the capacitor Css to initiate a soft-start cycle.
Thermal Shutdown
If the junction temperature exceeds the thermal shutdown (TJ= +150°C) then the part will enter a shutdown state.
A thermal sensor turns off both pass transistors, allowing the device to cool down. After the junction temperature
reduces by 40°C, the regulator starts to regulate again; resulting in a pulsed output during continuous thermal
overload conditions.
Power Inputs
Input powers up sequence are not required for VIN and VCNTL. Be careful; do not apply voltage to VOUT when there
is no VCNTL voltage presented. This is due to the internal parasitic diodes between VOUT to VIN and VOUT to VCNTL
which will be forward bias.
Reference Voltage
The reference voltage is programmed by a resistor divider between VIN and GND pins. The recommended resistor
is < 5kΩ to maintain the accuracy of the output voltage. For improved the performance, an external bypass capacitor
can be used, located close to VREF pin to help with noise. A ceramic capacitor can be use and is selected to be
greater than 0.1μF. Do not place any additional loading on this reference input pin.



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