1.

General description

The 74LVC2G34 provides two buffers.

Inputs can be driven from either 3.3 V or 5 V devices. These features allow the use of

these devices in a mixed 3.3 V and 5 V environment.

the device when it is powered down.

2.

Features and benefits

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant inputs for interfacing with 5 V logic

High noise immunity

Complies with JEDEC standard:

JESD8-7 (1.65 V to 1.95 V)

JESD8-5 (2.3 V to 2.7 V)

JESD8B/JESD36 (2.7 V to 3.6 V)

ESD protection:

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115-A exceeds 200 V

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Multiple package options

Specified from

−40 °Cto+85 °C and −40 °C to +125 °C.

74LVC2G34

Dual buffer gate

Rev. 5 — 2 September 2010

Product data sheet