STP1612PW05 datasheet(23/35 Pages) STMICROELECTRONICS

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STP1612PW05

Delay time of staggered output

Doc ID 15819 Rev 4

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For example,

HC = 1, G = 1.25, D = (256x1.25-128)/3 = 64

the D in binary form would be:

D = 64 = 1x26+0x25+0x24+0x23+0x22+0x21+0x20

The bit 9 to bit 2 of the configuration register are set to 8’b1100,0000.

Delay time of staggered output

This feature prevents large inrush current from the power line and reduces the bypass

capacitors.

The outputs are organized in four groups OUT4n, OUT4n+1, OUTn4+2, OUT4n+3 and each

group has 40 ns delay between the previous one.

E.g.: OUT4n has no delay, OUTn4+1 has 40ns delay, OUTn4+2 has 80ns delay, OUTn4+3

has 120 ns delay.

Thermal protection

Thermal flag provides an indication about the status of the junction temperature. When the

junction temperature reaches 150 °C the bit E of the configuration register is set to “1”,

signaling dangerous operating condition. This flag is useful when thermal shutdown function

is disabled.

The thermal shutdown function, if activated by configuration register, turns-off all output

channels if the junction exceeds 150 °C. As soon as the junction temperature is below 140

°C the outputs channels will be turned ON. In thermal shutdown mode, the digital core is

active and data flow is guaranteed.

STP1612PW05 데이터시트(PDF) 23 Page - STMicroelectronics