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ICS9220 데이터시트(PDF) 6 Page - Integrated Device Technology |
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ICS9220 데이터시트(HTML) 6 Page - Integrated Device Technology |
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6 / 17 page ![]() 6 ICS9220 1227G—11/05/07 SMBus Table: VCO Frequency Control Register Pin # Name Control Function Type 0 1 PWD Bit 7 Reserved RW - - 0 Bit 6 Reserved RW - - 0 Bit 5 N DIV5 RW 0 Bit 4 N DIV4 RW 0 Bit 3 N DIV3 RW 1 Bit 2 N DIV2 RW 0 Bit 1 N DIV1 RW 1 Bit 0 N DIV0 RW 0 SMBus Table: Byte Count Register Pin # Name Control Function Type 0 1 PWD Bit 7 0 Bit 6 0 Bit 5 0 Bit 4 BC4 RW 0 Bit 3 BC3 RW 0 Bit 2 BC2 RW 1 Bit 1 BC1 RW 1 Bit 0 BC0 RW 1 Byte Count Programming Reserved Reserved Reserved Writing to this register will configure how many bytes will be read back, default is 07 = 7 bytes N Divider Programming b(5:0) The decimal representation of M and N Divider in Byte 5 and 6 will configure the PLL VCO frequency. VCO frequency = 100 x {[NDIV(5:0)+2]/[MDIV(3:0)+2]} - Byte 7 - - - - - Byte 6 - - - - - - - |
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