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Insertion Loss on OP1

Insertion Loss on OP2

OP1 Isolation 950 - 1450 MHz

OP2 Isolation 950 - 1450 MHz

Input to

Output State

Interfering

Signal

State

Min.

(dB)

Typ.

(dB)

HL to OP1

VL to OP1

All Other States

11

All Other States

38

40

41

>43

VL to OP1

VH to OP1

All Other States

2

All Other States

39

40

42

>43

VH to OP1

All States

All States

43

>46

HH to OP1

All States

All States

37

>40

Input to

Output State

Interfering

Signal

State

Min.

(dB)

Typ.

(dB)

HL to OP2

HH to OP2

All Other States

15

All Other States

38

40

41

>43

VH to OP2

HL to OP2

All Other States

6

All Other States

37

40

40

>43

VL to OP2

HL to OP2

All Other States

1

All Other States

37

40

40

>43

HH to OP2

All States

All States

38

>41

(Continued)

-10

-8

-6

-4

-2

0

0.2

0.6

1

1.4

1.8

2.2

2.6

3

VL to OP1 (state 1)

VL to OP1 (state 2)

VH to OP1 (state 5)

VH to OP1 (state 6)

HL to OP1 (state 11)

HL to OP1 (state 12)

HH to OP1 (state 15)

HH to OP1 (state 16)

FREQUENCY (GHz)

-10

-8

-6

-4

-2

0

0.2

0.6

1

1.4

1.8

2.2

2.6

3

VL to OP2 (state 1)

VL to OP2 (state 5)

VH to OP2 (state 2)

VH to OP2 (state 6)

HL to OP2 (state 11)

HL to OP2 (state 15)

HH to OP2 (state 12)

HH to OP2 (state 16)

FREQUENCY (GHz)

Parameter

Conditions

Frequency

Min.

Typ.

Max.

Units

Return Loss (Output OP1/OP2)

200 - 950

950 - 2150

2150 - 3000

9

11

8

13

14

13

dB

dB

dB

Output IP3

200 - 3000

22

27

dBm

Input Power for 1 dB Compression

200 - 3000

18

22

dBm

Switching Speed

tRISE / tFALL (10/90% RF)

tON / tOFF (50% CTL to 10/90% RF)

6.0

6.5

ns

ns

HMC596LP4 / 596LP4E

v01.0409

SMT CMOS 4x2 SWITCH

MATRIX, 0.2 - 3.0 GHz