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BA3472FV 데이터시트(PDF) 36 Page - Rohm |
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BA3472FV 데이터시트(HTML) 36 Page - Rohm |
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36 / 41 page ![]() Datasheet www.rohm.com TSZ02201-0RAR0G200100-1-2 © 2012 ROHM Co., Ltd. All rights reserved. 36/39 27.FEB.2012 Rev.001 TSZ22111・15・001 BA3472, BA3472R, BA3474, BA3474R ●Operational Notes 1) Unused circuits When there are unused circuits it is recommended that they are connected as in Fig.100, setting the non-inverting input terminal to a potential within input common-mode voltage range (Vicm). 2) Input terminal voltage Applying GND + 36V to the input terminal is possible without causing deterioration of the electrical characteristics or destruction, irrespective of the supply voltage. However, this does not ensure normal circuit operation. Please note that the circuit operates normally only when the input voltage is within the common mode input voltage range of the electric characteristics. 3) Power supply (single / dual) The op-amp operates when the specified voltage supplied is between VCC and VEE. Therefore, the single supply op-amp can be used as dual supply op-amp as well. 4) Power dissipation Pd Using the unit in excess of the rated power dissipation may cause deterioration in electrical characteristics due to a rise in chip temperature, including reduced current capability. Therefore, please take into consideration the power dissipation (Pd) under actual operating conditions and apply a sufficient margin in thermal design. Refer to the thermal derating curves for more information. 5) Short-circuit between pins and erroneous mounting Incorrect mounting may damage the IC. In addition, the presence of foreign particles between the outputs, the output and the power supply, or the output and GND may result in IC destruction. 6) Operation in a strong electromagnetic field Operation in a strong electromagnetic field may cause malfunctions. 7) Radiation This IC is not designed to withstand radiation. 8) IC handing Applying mechanical stress to the IC by deflecting or bending the board may cause fluctuations in the electrical characteristics due to piezoelectric (piezo) effects. 9) Board inspection Connecting a capacitor to a pin with low impedance may stress the IC. Therefore, discharging the capacitor after every process is recommended. In addition, when attaching and detaching the jig during the inspection phase, ensure that the power is turned OFF before inspection and removal. Furthermore, please take measures against ESD in the assembly process as well as during transportation and storage. 10) Output capacitor Discharge of the external output capacitor to VCC is possible via internal parasitic elements when VCC is shorted to VEE, causing damage to the internal circuitry due to thermal stress. Therefore, when using this IC in circuits where oscillation due to output capacitive load does not occur, such as in voltage comparators, use an output capacitor with a capacitance less than 0.1µF. Status of this document The Japanese version of this document is formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document formal version takes priority. Fig.100 Unused circuit example VCC VEE + - Please keep this potential in Vicm |
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