SC461 datasheet(16/31 Pages) SEMTECH

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SC461

by the output capacitor. If the inductor current does not

reach zero on any switching cycle, the controller immedi-

ately exits power-save and returns to forced continuous

mode. Figure 6 shows power-save operation at light

loads.

FB Ripple

Voltage

(VFB)

FB threshold

Inductor

Current

Zero (0A)

DH On-time is triggered when

VFB reaches the FB Threshold.

On-time (TON)

DL drives high when on-time is completed.

DL remains high until inductor current reaches zero.

Dead time varies

according to load

Figure 6 — Power-Save Operation

Smart Power-Save Protection

Active loads may leak current from a higher voltage into

the switcher output. Under light load conditions with

power-save enabled, this can force V

OUT to slowly rise and

reach the over-voltage threshold, resulting in an over-

voltage shutdown. Smart power-save prevents this condi-

tion. When the FB voltage exceeds 10% above nominal

(exceeds 660mV), the device immediately disables power-

save and DL drives high to turn on the low-side MOSFET.

This draws current from V

OUT through the inductor and

causes V

OUT to fall. When VFB drops back to the 600mV trip

point, a normal T

ON switching cycle begins. This method

prevents over-voltage shutdown by cycling energy from

OUT back to VIN. It also minimizes operating power under

light load conditions by avoiding forced continuous mode

operation.

Figure 7 shows typical waveforms for the Smart Power-

save feature.

threshold

High-side

Drive (DH)

Low-side

Drive (DL)

VOUT drifts up to due to leakage

current flowing into COUT

DH and DL off

DL turns on when Smart

PSAVE threshold is reached

Smart Power Save

Threshold

DL turns off when FB

threshold is reached

Single DH on-time pulse

after DL turn-off

VOUT discharges via inductor

and low-side MOSFET

Normal DL pulse after DH

on-time pulse

Normal VOUT ripple

Figure 7 — Smart Power-Save

SmartDriveTM

For each DH pulse, the DH driver initially turns on the

high-side MOSFET at a slower speed, allowing a softer,

smooth turn-off of the low-side diode. Once the diode is

off and the LX voltage has risen 0.8V above PGND, the

SmartDrive circuit automatically drives the high-side

MOSFET on at a rapid rate. This technique reduces switch-

ing noise while maintaining high efficiency, reducing the

need for snubbers.

Enable Input for Switching Regulator

The EN input is a logic level input. When EN is low

(grounded), the switching regulator is off and in its lowest

power state. When EN is low and VDDA is above the VDDA

UVLO threshold, the output of the switching regulator

soft-discharges into the VOUT pin through an internal

2kΩ resistor. When EN is a logic high (>1V) the switching

regulator is enabled.

The EN input has internal resistors — 2MΩ pullup to

VDDA, and a 1MΩ pulldown to AGND. These resistors will

normally cause the EN voltage to be near the logic high

trip point as VDDA reaches the VDDA UVLO threshold.

To prevent undesired toggling of EN and erratic start-up

performance, the EN pin should not be allowed to float as

open-circuit.

Applications Information (continued)

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