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MICRF220 데이터시트(PDF) 2 Page - Micrel Semiconductor |
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MICRF220 데이터시트(HTML) 2 Page - Micrel Semiconductor |
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2 / 18 page ![]() Micrel, Inc. MICRF220 August 2010 2 M9999-082610-A Pin Configuration MICRF220AYQS Pin Description Pin Number Pin Name Pin Function 1 RO1 Reference resonator connection to the Pierce oscillator. May also be driven by external reference signal of 200mVp-p to 1.5V p-p amplitude maximum. Internal capacitance of 7pF to GND during normal operation. 2 GNDRF Ground connection for ANT RF input. Connect to PCB ground plane. 3 ANT Antenna Input: RF Signal Input from Antenna. Internally AC coupled. It is recommended to use a matching network with an inductor-to-RF ground to improve ESD protection. 4 GNDRF Ground connection for ANT RF input. Connect to PCB ground plane. 5 VDD Positive supply connection for all chip functions. Bypass with 0.1μF capacitor located as close to the VDD pin as possible. 6 SQ Squelch Control Logic-Level Input. An internal pull-up (5μA typical) pulls the logic-input HIGH when the device is enabled. A logic LOW on SQ squelches, or reduces, the random activity on DO pin when there is no RF input signal. 7 SEL0 Demodulator Filter Bandwidth Select Logic-Level Input. This pin has an internal pull-up (3μA typical) when the chip is on. Use in conjunction with SEL1 to control demodulation bandwidth. 8 SHDN Shutdown Control Logic-Level Input. A logic-level LOW enables the device. A logic-level HIGH places the device in low-power shutdown mode. An internal pull-up (5μA typical) pulls the logic input HIGH. 9 GND Ground connection for all chip functions except for RF input. Connect to PCB ground plane. 10 DO Data Output. Demodulated data output. A current limited CMOS output during normal operation, 25kΩ pull- down is present when device is in shutdown. 11 SEL1 Demodulator Filter Bandwidth Select Logic-Level Input. This pin has an internal pull-up (3μA typical) when the chip is on. Use in conjunction with SEL0 to Demodulation bandwidth. 12 CTH Demodulation Threshold Voltage Integration Capacitor. Connect a 0.1μF capacitor from CTH pin-to-GND to provide a stable slicing threshold. 13 CAGC AGC Filter Capacitor. Connect a capacitor from this pin to GND. Refer to the AGC Loop and CAGC section for information on the capacitor value. 14 RSSI Received Signal Strength Indicator. The voltage on this pin is an inversed amplified version of the voltage on CAGC. Output is from a switched capacitor integrating op amp with 250Ω typical output impedance. 15 NC No Connect. Leave this pin floating. 16 RO2 Reference resonator connection to the Pierce oscillator. Internal capacitance of 7pF to GND during normal operation. |
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