전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

TSL25713 데이터시트(PDF) 5 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

부품명 TSL25713
상세설명  LIGHT-TO-DIGITAL CONVERTER
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
홈페이지  http://www.taosinc.com
Logo TAOS - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

TSL25713 데이터시트(HTML) 5 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS

  TSL25713 Datasheet HTML 1Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 2Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 3Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 4Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 5Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 6Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 7Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 8Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS TSL25713 Datasheet HTML 9Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 24 page
background image
TSL2571
LIGHT-TO-DIGITAL CONVERTER
TAOS117A − FEBRUARY 2011
5
The LUMENOLOGY
r Company
r
r
Copyright
E 2011, TAOS Inc.
www.taosinc.com
Wait Characteristics, VDD = 3 V, TA = 255C, WEN = 1 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
CHANNEL
MIN
TYP
MAX
UNIT
Wait step size
WTIME = 0xFF
2.58
2.72
2.9
ms
Wait number of integration steps
1
256
steps
AC Electrical Characteristics, VDD = 3 V, TA = 255C (unless otherwise noted)
PARAMETER†
TEST CONDITIONS
MIN
TYP
MAX
UNIT
f(SCL)
Clock frequency (I2C only)
0
400
kHz
t(BUF)
Bus free time between start and stop condition
1.3
μs
t(HDSTA)
Hold time after (repeated) start condition. After
this period, the first clock is generated.
0.6
μs
t(SUSTA)
Repeated start condition setup time
0.6
μs
t(SUSTO)
Stop condition setup time
0.6
μs
t(HDDAT)
Data hold time
0
μs
t(SUDAT)
Data setup time
100
ns
t(LOW)
SCL clock low period
1.3
μs
t(HIGH)
SCL clock high period
0.6
μs
tF
Clock/data fall time
300
ns
tR
Clock/data rise time
300
ns
Ci
Input pin capacitance
10
pF
† Specified by design and characterization; not production tested.
PARAMETER MEASUREMENT INFORMATION
SDA
SCL
Stop
Start
SCLACK
t(LOWMEXT)
t(LOWMEXT)
t(LOWSEXT)
SCLACK
t(LOWMEXT)
Start
Condition
Stop
Condition
P
SDA
t(SUSTO)
t(SUDAT)
t(HDDAT)
t(BUF)
VIH
VIL
SCL
t(SUSTA)
t(HIGH)
t(F)
t(R)
t(HDSTA)
t(LOW)
VIH
VIL
PS
S
Figure 1. Timing Diagrams



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com