AD9577BCPZ-R7 datasheet(18/44 Pages) AD

부품명	AD9577BCPZ-R7

상세설명	Clock Generator with Dual PLLs

PDF	44 Pages

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18 / 44 page

AD9577

Data Sheet

Rev. 0 | Page 18 of 44

Pin No.

Mnemonic

Description

VSOB1A

Output Port OUT1 Power Supply.

SDA

Serial Data Line for I2C.

VSOB0A

Output Port OUT0 Power Supply.

OUT0N

LVPECL/LVDS/CMOS Clock Output.

OUT0P

LVPECL/LVDS/CMOS Clock Output.

SCL

Serial Clock for I2C.

VSVA

PLL1 VCO Power Supply.

TST2A

Test Pin. Connect this pin to the printed circuit board (PCB) ground plane.

MAX_BW

Logic 1 widens the loop bandwidth of the fractional-N PLL during spread spectrum. Internal 30 kΩ pull-

down resistor.

EPAD

The exposed paddle on this package is an electrical connection as well as a thermal enhancement. For

the device to function properly, the paddle must be attached to ground (GND). It is recommended that

a minimum of nine vias be used to connect the paddle to the printed circuit board (PCB) ground plane.

AD9577BCPZ-R7 데이터시트(PDF) 18 Page - Analog Devices