ADF4196

Data Sheet

Rev. B | Page 2 of 28

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Timing Characteristics ................................................................ 4

Absolute Maximum Ratings............................................................ 5

Thermal Resistance ...................................................................... 5

Transistor Count........................................................................... 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Typical Performance Characteristics ............................................. 8

Theory of Operation ...................................................................... 11

General Description................................................................... 11

Reference Input........................................................................... 11

RF Input Stage............................................................................. 11

PFD and Charge Pump.............................................................. 12

Differential Charge Pump ......................................................... 12

Fast Lock Timeout Counters..................................................... 12

Differential Amplifier ................................................................ 13

MUXOUT and Lock Detect ......................................................... 13

Input Shift Register .................................................................... 13

Register Map ................................................................................... 14

FRAC/INT Register (R0) Latch Map....................................... 15

MOD/R Register (R1) Latch Map ............................................ 16

Phase Register (R2) Bit Latch Map .......................................... 17

Function Register (R3) Latch Map........................................... 18

Charge Pump Register (R4) Latch Map .................................. 19

Power-Down Register (R5) Bit Map ........................................ 20

Mux Register (R6) Latch Map and Truth Table ..................... 21

Programming the ADF4196.......................................................... 22

Worked Example ........................................................................ 22

Spur Mechanisms ....................................................................... 22

Power-Up Initialization ............................................................. 23

Changing the Frequency of the PLL and the Phase Lookup

Table ............................................................................................. 23

Applications Information .............................................................. 25

Local Oscillator for a GSM Base Station ................................. 25

Interfacing ................................................................................... 27

PCB Design Guidelines ............................................................. 27

Outline Dimensions....................................................................... 28

Ordering Guide .......................................................................... 28

REVISION HISTORY

12/11—Rev. A to Rev. B

Changes to Figure 10, Figure 11, Figure 13, and

Figure 14 ............................................................................................ 9

Change to Figure 31 ....................................................................... 17

10/11—Revision A: Initial Version