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ADP2164ACPZ-2.5-R7 데이터시트(PDF) 15 Page - Analog Devices |
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ADP2164ACPZ-2.5-R7 데이터시트(HTML) 15 Page - Analog Devices |
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15 / 20 page ![]() Data Sheet ADP2164 Rev. 0 | Page 15 of 20 POWER GOOD PGOOD is an active high, open-drain output and requires a resistor to pull it up to the logic supply voltage. PGOOD high indicates that the voltage on the FB pin (and, therefore, the output voltage) is within 10% of the desired value. PGOOD low indicates the opposite. There is a 16-cycle waiting period after the FB voltage is detected as being out of bounds. If FB returns to within the ±10% range, it is ignored by the PGOOD circuitry. CURRENT LIMIT AND SHORT-CIRCUIT PROTECTION The ADP2164 has a peak current limit protection circuit to prevent current runaway. The peak current limit is 6.2 A. When the inductor current reaches the peak current limit, the high-side MOSFET turns off and the low-side MOSFET turns on until the next cycle begins. The overcurrent counter is incremented by 1 at each peak current limit event. If the overcurrent counter exceeds 10, the part enters hiccup mode, and the high-side FET and low-side FET are both turned off. The part remains in this mode for 4096 clock cycles and then attempts to restart using soft start. If the current limit fault has cleared, the part resumes normal operation. If the current limit fault has not cleared, the part reenters hiccup mode after first counting 10 current limit violations. OVERVOLTAGE PROTECTION (OVP) Overvoltage protection (OVP) circuitry is integrated in the ADP2164. The output voltage is continuously monitored by a comparator through the FB pin, which is at 0.6 V (typical) under normal operation. The comparator is activated when the FB voltage exceeds 0.66 V (typical), thus indicating an output overvoltage condition. If the voltage remains above the OVP threshold for 16 clock cycles, the high-side MOSFET turns off and the low-side MOSFET turns on until the current through it reaches the −1.3 A current limit. Both MOSFETs remain in the off state until FB falls below 0.54 V (typical), after which the part restarts. The behavior of PGOOD under this condition is described in the Power Good section. UNDERVOLTAGE LOCKOUT (UVLO) Undervoltage lockout (UVLO) circuitry is integrated in the ADP2164. If the input voltage falls below 2.5 V, the ADP2164 shuts down, and both the power switch and the synchronous rectifier turn off. When the voltage rises above 2.6 V again, the soft start is initiated, and the part is enabled. THERMAL SHUTDOWN If the ADP2164 junction temperature rises above 140°C, the thermal shutdown circuit turns off the regulator. Extreme junc- tion temperatures can be the result of high current operation, poor circuit board design, and/or high ambient temperature. When thermal shutdown occurs, a 15°C hysteresis ensures that the ADP2164 does not return to operation until the on-chip temperature falls below 125°C. Soft start is initiated when the part comes out of thermal shutdown. |
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