전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ADRF6701ACPZ-R7 데이터시트(PDF) 23 Page - Analog Devices

부품명 ADRF6701ACPZ-R7
상세설명  400 MHz to 1250 MHz Quadrature Modulator
PDF  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADRF6701ACPZ-R7 데이터시트(HTML) 23 Page - Analog Devices

Back Button ADRF6701ACPZ-R7 Datasheet HTML 19Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 20Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 21Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 22Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 23Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 24Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 25Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 26Page - Analog Devices ADRF6701ACPZ-R7 Datasheet HTML 27Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 23 / 36 page
background image
Data Sheet
ADRF6701
Rev. 0 | Page 23 of 36
REGISTER 3—Σ-Δ MODULATOR DITHER CONTROL
(DEFAULT: 0x10000B)
With Register 3, Bits[2:0] set to 011, the on-chip Σ-Δ modulator
dither control register is programmed as shown in Figure 44. The
recommended and default setting for dither enable is enabled (1).
The default value of the dither magnitude (15) should be set to a
recommended value of 1.
The dither restart value can be programmed from 0 to 217 − 1,
though a value of 1 is typically recommended.
DITHER
ENABLE
DB23
DB22
DB21
DB20
DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
0
DITH1
DITH0
DEN
DV16 DV15 DV14 DV13 DV12 DV11 DV10 DV9 DV8 DV7 DV6 DV5 DV4 DV3 DV2 DV1 DV0 C3(0) C2(1) C1(1)
DITH1
DITH0
00
01
10
11
DEN
0
1
DITHER
MAGNITUDE
DITHER RESTART VALUE
CONTROL BITS
DITHER MAGNITUDE
15 (DEFAULT)
7
3
1 (RECOMMENDED)
DITHER ENABLE
DISABLE
ENABLE (DEFAULT, RECOMMENDED)
DV16 DV15 DV14 DV13 DV12 DV11 DV10 DV9 DV8 DV7 DV6 DV5 DV4 DV3 DV2 DV1 DV0
00
0
0
0
0
00
0
0
0
0
0
0
0
0
1
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
11
1
1
1
1
11
1
1
1
1
1
1
1
1
DV2
0
...
...
11
0x00001 (DEFAULT)
...
...
0x1FFFF
DITHER RESTART
VALUE
Figure 44. Register 3—Σ-Δ Modulator Dither Control Register Map



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com