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ADV7619 데이터시트(PDF) 21 Page - Analog Devices |
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ADV7619 데이터시트(HTML) 21 Page - Analog Devices |
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21 / 24 page ![]() Data Sheet ADV7619 Rev. B | Page 21 of 24 Table 12. Special SDR 4:2:2 and 4:4:4 Output Modes for Video with Pixel Clock Frequencies Above 170 MHz1 2 × SDR 4:2:2 Interleaved—OP_FORMAT_SEL[7:0] = 2 × SDR 4:4:4 Interleaved—OP_FORMAT_SEL[7:0] = 0x94 0x95 0x96 0x54 Pixel Output 2 × 16-Bit Mode 02 2 × 20-Bit Mode 02 2 × 24-Bit Mode 02 2 × 24-Bit Mode 02 P47 Y7-0 Y9-0 Y11-0 G7-0 P46 Y6-0 Y8-0 Y10-0 G6-0 P45 Y5-0 Y7-0 Y9-0 G5-0 P44 Y4-0 Y6-0 Y8-0 G4-0 P43 Y3-0 Y5-0 Y7-0 G3-0 P42 Y2-0 Y4-0 Y6-0 G2-0 P41 Y1-0 Y3-0 Y5-0 G1-0 P40 Y0-0 Y2-0 Y4-0 G0-0 P39 High-Z Y1-0 Y3-0 B7-0 P38 High-Z Y0-0 Y2-0 B6-0 P37 High-Z High-Z Y1-0 B5-0 P36 High-Z High-Z Y0-0 B4-0 P35 Cb7-0 Cb9-0 Cb11-0 B3-0 P34 Cb6-0 Cb8-0 Cb10-0 B2-0 P33 Cb5-0 Cb7-0 Cb9-0 B1-0 P32 Cb4-0 Cb6-0 Cb8-0 B0-0 P31 Cb3-0 Cb5-0 Cb7-0 R7-0 P30 Cb2-0 Cb4-0 Cb6-0 R6-0 P29 Cb1-0 Cb3-0 Cb5-0 R5-0 P28 Cb0-0 Cb2-0 Cb4-0 R4-0 P27 High-Z Cb1-0 Cb3-0 R3-0 P26 High-Z Cb0-0 Cb2-0 R2-0 P25 High-Z High-Z Cb1-0 R1-0 P24 High-Z High-Z Cb0-0 R0-0 P23 Y7-1 Y9-1 Y11-1 G7-1 P22 Y6-1 Y8-1 Y10-1 G6-1 P21 Y5-1 Y7-1 Y9-1 G5-1 P20 Y4-1 Y6-1 Y8-1 G4-1 P19 Y3-1 Y5-1 Y7-1 G3-1 P18 Y2-1 Y4-1 Y6-1 G2-1 P17 Y1-1 Y3-1 Y5-1 G1-1 P16 Y0-1 Y2-1 Y4-1 G0-1 P15 High-Z Y1-1 Y3-1 B7-1 P14 High-Z Y0-1 Y2-1 B6-1 P13 High-Z High-Z Y1-1 B5-1 P12 High-Z High-Z Y0-1 B4-1 P11 Cr7-0 Cr9-0 Cr11-0 B3-1 P10 Cr6-0 Cr8-0 Cr10-0 B2-1 P9 Cr5-0 Cr7-0 Cr9-0 B1-1 P8 Cr4-0 Cr6-0 Cr8-0 B0-1 P7 Cr3-0 Cr5-0 Cr7-0 R7-1 P6 Cr2-0 Cr4-0 Cr6-0 R6-1 P5 Cr1-0 Cr3-0 Cr5-0 R5-1 P4 Cr0-0 Cr2-0 Cr4-0 R4-1 P3 High-Z Cr1-0 Cr3-0 R3-1 P2 High-Z Cr0-0 Cr2-0 R2-1 P1 High-Z High-Z Cr1-0 R1-1 P0 High-Z High-Z Cr0-0 R0-1 1 These modes require additional writes. (write 80 to DPLL map Register 0xC3, write 03 to DPLL map Register 0xCF, and write A0 to IO map Register 0xDD). Refer to Hardware User Guide UG-237. 2 xx-0 and xxx-0 correspond to odd samples; xx-1 and xxx-1 correspond to even samples. |
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