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ES51995 데이터시트(PDF) 21 Page - Cyrustek corporation

부품명 ES51995
상세설명  DMM Analog front end with PEAK
PDF  27 Pages
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제조업체  CYRUSTEK [Cyrustek corporation]
홈페이지  http://www.cyrustek.com.tw
Logo CYRUSTEK - Cyrustek corporation

ES51995 데이터시트(HTML) 21 Page - Cyrustek corporation

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ver. 2.8
12/01/12
21
ES51995(6000counts)
DMM Analog front end with PEAK
2.9 ADP mode
MPU send write command to select the ADP mode measurement function. The Hz mode
measurement is available to be enabled with the ADP AC function (set AC bit to 1)
simultaneously. The measured signal is applied to ADP terminal (pin39). The signal full
scale is 600mV for DC mode and 600mVrms for AC mode. The FS60 control bit is used for
ADP DC mode. When FS60=1, the full scale will be change from 600mV to 60mV. It
means the resolution will be improved to 0.01mV, but the ADC conversion rate will be
reduced to 0.9 /sec.
See the next table of function command:
F3
F2
F1
F0
AC
Measurement mode
Read data bytes
1
0
0
1
0
ADP DC mode
D0(0:18), D1(0:9)
1
0
0
1
1
ADP AC mode
D0(0:18), D1(0:9)
1
0
1
0
1
ADP + Hz mode
D0(0:18), D1(0:9), D3(0:18)
Note1: D0/D1/D3 all are binary format. ASIGN/BSIGN are the sign bit of D0/D1, respectively.
Note2: See PEAK mode (section 2.10) also.
Frequency range control for ADP+Hz mode
FQ2 FQ1 FQ0 Full Scale Range
0
0
0
60.00Hz
0
0
1
600.0Hz
0
1
0
6.000kHz
0
1
1
60.00kHz
Note: See frequency mode (section 2.8) also
If MPU set the control bit EXT_ADP=1, the voltage on EXTSRC pin could be switched to
ADP terminal internally. It is helpful for a voltage pulled application of ADP mode.
ADC IN+
ADC IN-
SGND
pull high or low
EXT_ADP
ADP_IN
External source
ADC IN+
ADC IN-
SGND
pull high or low
EXT_ADP
ADP_IN
External source



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