6T10AI-SW datasheet(5/6 Pages) NELLSEMI

5 / 6 page

www.nellsemi.com

Page 5 of 6

-40

-20

100

120

140

0.0

0.5

1.0

1.5

2.0

2.5

,I ,I [T ] /

GT H L

,I ,I [T =25°C ]

GT H L

IGT

IH& IL

0.1

1.0

10.0

100.0

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

2.4

(dV/dt)c (V/µs)

(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c

BW/CW

0.1

1.0

10.0

100.0

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

(dV/dt)c (V/µs)

(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c

100

125

(dI/dt)c [T ] /

pecified]

(dI/dt)c [T s

T (°C)

SEMICONDUCTOR

6T Series RoHS

RoHS

Fig.7 Relative variation of gate trigger current,holding

current and latching current versus junction

temperature (typical values).

Fig.8 Relative variation of critical rate of decrease

of main current versus (dV/dt)c (typical values).

Snubberless & Logic Level Types

Fig.9 Relative variation of critical rate of decrease

of main current versus (dV/dt)C (typical values)

(Standard types).

Fig.10 Relative variation of critical rate decrease of

main current versus junction temperature .

100

1000

(A)

TSM

Number of cycles

t=20ms

One cycle

Non repetitive

T initial=25°C

Repetitive

0.01

0.10

1.00

10.00

100

1000

(A), I t (A s)

TSM

T initial=25°C

ITSM

dI/dt limitation:

50A/µs

I t

T =105°C

t (ms)

Fig.5 Surge peak on-state current versus number

of cycles.

Fig.6 Non-repetitive surge peak on-state current

for a sinusoidal pulse with width tp < 10ms.

and corresponding value of l t.

6T10AI-SW 데이터시트(PDF) 5 Page - Nell Semiconductor Co., Ltd

6T10AI-SW 데이터시트(HTML) 5 Page - Nell Semiconductor Co., Ltd

Html Pages

1 2 3 4 5 6

데이터시트 다운로드

링크 URL