TLC5948A

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SBVS192 – MARCH 2012

Table 11. LOD Threshold Voltage Truth Table

LODVLT

BIT 124

BIT 123

LED OPEN DETECTION (LOD) THRESHOLD VOLTAGE

0

0

VLOD0 (0.3 V, typ)

0

1

VLOD1 (0.6 V, typ)

1

0

VLOD2 (0.9 V, typ)

1

1

VLOD3 (1.2 V, typ)

Table 12. LSD Threshold Voltage Truth Table

LSDVLT

BIT 126

BIT 125

LED SHORT DETECTION (LSD) THRESHOLD VOLTAGE

0

0

VLSD0 (0.35 × VCC, typ)

0

1

VLSD1 (0.45 × VCC, typ)

1

0

VLSD2 (0.55 × VCC, typ)

1

1

VLSD3 (0.65 × VCC, typ)

Table 13. LOD and LSD Data Latch Time Truth Table

LATTMG

BIT 128

BIT 127

LOD and LSD DATA LATCH TIMING

0

0

0

1

1

0

1

1

(1)

When DSPRPT is '1' and IDMRPT is '0', the resulting LOD and LSD data are loaded to the LOD and LSD data latch only once after new

GS data are written into the second GS data latch.

Table 14. IDM Sink Current Truth Table

IDMCUR

BIT 132

BIT 131

INVISIBLE DETECTION MODE (IDM) SINK CURRENT

0

0

2

μA (typ)

0

1

10

μA (typ)

1

0

20

μA (typ)

1

1

1 mA (typ)

Copyright © 2012, Texas Instruments Incorporated

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