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EDJ2104BASE 데이터시트(PDF) 4 Page - Elpida Memory |
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EDJ2104BASE 데이터시트(HTML) 4 Page - Elpida Memory |
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4 / 148 page ![]() EDJ2104BASE, EDJ2108BASE Preliminary Data Sheet E1505E20 (Ver. 2.0) 4 CONTENTS Specifications.................................................................................................................................................1 Features.........................................................................................................................................................1 Ordering Information......................................................................................................................................2 Part Number ..................................................................................................................................................2 Pin Configurations .........................................................................................................................................3 Electrical Conditions ......................................................................................................................................6 Absolute Maximum Ratings .........................................................................................................................6 Operating Temperature Condition ...............................................................................................................6 Recommended DC Operating Conditions (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ..................7 AC and DC Input Measurement Levels (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V)......................7 VREF Tolerances ........................................................................................................................................8 Input Slew Rate Derating .............................................................................................................................9 AC and DC Logic Input Levels for Differential Signals...............................................................................15 AC and DC Output Measurement Levels (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) .................20 AC Overshoot/Undershoot Specification....................................................................................................22 Output Driver Impedance...........................................................................................................................23 On-Die Termination (ODT) Levels and I-V Characteristics ........................................................................25 ODT Timing Definitions..............................................................................................................................27 IDD Measurement Conditions (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ..................................31 Electrical Specifications...............................................................................................................................44 DC Characteristics 1 (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................................................44 Pin Capacitance (TC = 25 °C, VDD, VDDQ = 1.5V ± 0.075V)....................................................................46 Standard Speed Bins.................................................................................................................................47 AC Characteristics (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V, VSS, VSSQ = 0V)......................51 Block Diagram .............................................................................................................................................65 Pin Function.................................................................................................................................................66 Command Operation ...................................................................................................................................68 Command Truth Table...............................................................................................................................68 CKE Truth Table ........................................................................................................................................72 Simplified State Diagram .............................................................................................................................73 RESET and Initialization Procedure ............................................................................................................74 Power-Up and Initialization Sequence .......................................................................................................74 Reset and Initialization with Stable Power .................................................................................................75 Programming the Mode Register.................................................................................................................76 Mode Register Set Command Cycle Time (tMRD) ....................................................................................76 MRS Command to Non-MRS Command Delay (tMOD) ............................................................................76 DDR3 SDRAM Mode Register 0 [MR0] .....................................................................................................77 DDR3 SDRAM Mode Register 1 [MR1] .....................................................................................................78 DDR3 SDRAM Mode Register 2 [MR2] .....................................................................................................79 |
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