TLE 4268

Semiconductor Group

3

1998-11-01

Pin Configuration

(top view)

Figure 2

Pin Definitions and Functions

Pin

Symbol Function

1, 2, 8, 13,

19, 20

N. C.

Not connected.

3QRES

Reset output; the open collector output is connected to the

5-V output via an integrated resistor of 30 k

Ω.

4 … 7,

14 … 17

GND

Ground

9DRES

Reset delay; connect a capacitor to ground for delay time

adjustment.

10

SRES

Reset switching threshold; for setting the switching threshold,

output to ground with voltage divider. If this input is connected to

ground, the reset is triggered at an output voltage of 4.5 V.

11

W

Watchdog input; positive-edge-triggered input for monitoring a

microcontroller.

12

V

Q

5-V output voltage; block to ground with 22-

µF capacitor,

ESR

< 3 Ω.

18

V

I

Input voltage; block to ground directly on the IC with ceramic

capacitor.

AEP01540

GND

Q

V

N.C.

N.C.

13

14

10

15

9

16

8

17

N.C.

7

18

6

19

GND

5

20

4

3

2

1

GND

GND

N.C.

DRES

11

12

QRES

GND

GND

SRES

GND

GND

W

N.C.

N.C.

P-DSO-20-6